AMD's Helios rack lands Meta, OpenAI, Oracle and Microsoft as customers

AMD CEO Lisa Su used a Thursday keynote at the company's Advancing AI 2026 conference in San Francisco to lay out volume-production details for the Instinct MI455X accelerator, the Helios rack-scale system built around it, and EPYC "Venice," which AMD says is the industry's first x86 server processor built on TSMC's 2-nanometer process. The event doubled as a customer roundup: Meta, Microsoft, Oracle, OpenAI, and Anthropic all have confirmed deployments, several at gigawatt scale.

The announcements matter because AMD has spent the past two years trying to convert Nvidia's AI infrastructure dominance into a genuine two-horse race, and Thursday's customer list is the clearest evidence yet that hyperscalers are willing to build meaningful capacity on AMD silicon rather than treating it as a backup supplier. Meta said it will use up to 6 gigawatts of AMD GPUs over time, starting with 1 gigawatt on Helios racks later this year. OpenAI has made an equivalent 6-gigawatt commitment. Oracle is building a 50,000-GPU Helios supercluster, Microsoft is deploying Helios racks inside Azure data centers to power frontier-model inference, and Anthropic — an AMD partner since a deal disclosed earlier this year — will deploy up to 2 gigawatts of Instinct MI450-series GPUs, with the first gigawatt coming online in the first half of 2027.

On the hardware itself: each MI455X GPU carries 432GB of HBM4 memory across 16 stacks, delivering roughly 19.6 TB/s of memory bandwidth per chip. A complete Helios rack packs 72 MI455X accelerators alongside EPYC Venice CPUs and AMD's Pensando Vulcano networking silicon, pooling 31 terabytes of HBM4 memory and roughly 1.4 petabytes per second of aggregate memory bandwidth. AMD rates a full rack at 2.9 exaflops of FP4 inference compute and 1.4 exaflops at FP8 precision — figures the company is pitching directly against Nvidia's NVL72 rack systems. Pricing for a fully configured Helios rack has been reported at roughly $5.25 million. Shipments to customers, including Microsoft, begin in the second half of 2026.

EPYC Venice, the CPU half of the platform, is notable on its own: it's the first x86 server chip built on TSMC's 2nm node, arriving as AMD says it now holds 46% revenue share of the server CPU market — a figure that would have been unthinkable for AMD a decade ago, when Intel controlled the overwhelming majority of data-center CPU revenue.

Su also used the keynote to size the opportunity AMD is chasing: she projected the AI accelerator total addressable market at $1.4 trillion by 2030, the server CPU market at $220 billion by the same date, and combined silicon TAM — accelerators, CPUs, networking, and related infrastructure — at roughly $2 trillion, growing at a 40% compound annual rate. Those numbers are AMD's own projections and should be read as a company arguing for its stock price as much as a neutral market forecast, but the customer commitments announced alongside them are concrete, named, and dated.

For enterprise buyers and cloud customers, the practical upshot is that a credible AMD alternative to Nvidia's rack-scale systems is now shipping with real hyperscaler backing rather than existing only as a roadmap slide. Whether it meaningfully dents Nvidia's pricing power will depend less on Thursday's keynote than on whether AMD's ROCm software stack — historically the weaker link against Nvidia's CUDA ecosystem — can keep pace with the hardware AMD is now shipping at scale.